Surface-mount packages or chip carriers are useful to achieve high density circuits and may be easily manufactured with automated high volume manufacturing techniques. An example of such a chip carrier is shown in U.S. Pat. No. 4,595,096 to Sinnadurai, et al. Nakamura, et al., U.S. Pat. No. 4,692,789, discloses a package for high power semiconductor chips comprising a ceramic case and conductor lead plates. Davis Jr., U.S. Pat. No. 3,961,415, shows a chip carrier with ribbon leads attaching the chip to the carrier. Yerman, U.S. Pat. No. 4,538,170, discloses a high power chip package for removing heat from chips undergoing testing. Certain chip carriers exhibit hermetic sealing of the chip carrier for protection of the chip. Burns, U.S. Pat. No. 4,355,463, discloses a process for hermetically sealing semiconductor devices. The package shown by Yerman may be hermetically sealed.
The prior art, however, does not disclose a carrier which provides a high conductivity path through a hermetic seal which is capable of handling high currents and which can withstand the high thermal stresses associated with device construction and the longer term "IR" thermal stresses during the life of the component. Consequently, surface-mount chip carriers have generally not been employed in high power applications or applications in which a hermetically sealed surface-mount chip carrier was desirable.